Industrial Flash Memory

DOM USB 4GB pSLC

Ref.Mozaïk Storage : PMS-4118

The SFUI4096J1AE1TO-I-GS-2AP-STD, part of the series U-56 Series everbit by Swissbit AG, is offered in various capacities and temperature ranges. Please feel free to get in touch with us:
Description
  • Ref.Manufacturer : SFUI4096J1AE1TO-I-GS-2AP-STD
  • Series : U-56 Series everbit
  • Manufacturer : Swissbit AG
  • Operating temp. : -40°C ~ +85°C
  • Form factor : 2.54mm pitch

Product specifications

  • Manufacturer Swissbit AG
  • Manufacturer reference number SFUI4096J1AE1TO-I-GS-2AP-STD
  • Sub category DOM
  • Interface USB 2.0
  • Flash type pSLC
  • Form factor 2.54mm pitch
  • Capacity 4 GB
  • Endurance P/E Cycle (max.) 20 000 P/E cycles
  • Read Sequential (max.) 95 MB/s
  • Write Sequential (max.) 56 MB/s
  • TBW (max.) 83 TB
  • MTBF 3 000 000 hours
  • S.M.A.R.T. functionalities Yes
  • PowerProtector Yes
  • Operating temperature -40°C ~ +85°C
  • Storage temperature -40°C ~ +85°C
  • Chipset Industrial Grade
  • Power 3.3 V
    5.0 V
  • Vibrations 50G
  • Chocs 1500G
  • Additional information USB3.1 solid state flash drive for internal 9(10)-pin USB connector terminal
    Compliant with USB specification 3.1 Gen 1 (SuperSpeed
    5Gb/s burst)
    Backward compliant with USB 2.0/1.1 systems (High/Full Speed - 480/12Mb/s burst)
    2.54mm or 2.00mm connector with keyed pin9
    Mounting hole electrically not connected (optional grounded)
    Fixed drive (USB hard drive - optional removable)
    LED for operation indication
    Write protect switch (optional)
    Diagnostic features with Life Time Monitoring tool support
    Firmware update in field possible
    Up to 1100 IOPS write and 3200 IOPS read (4KByte transfers)
    Up to 110 MBytes/s sequential write and 175 MBytes/s read speed
    Power Supply: (Low-power CMOS technology)
    3.1 to 5.5V operating voltage
    Optimized FW algorithms especially for high read access and long data retention applications Patented power-off reliability technology
    Near Miss ECC technology
    Minimizes the risk of uncorrectable bit failure over the product life time. Each read command analyzes the ECC margin level and refreshes data if necessary.
    Read Disturb Management
    The read commands per block are monitored and the content is refreshed when critical levels are reached.
    Wear Leveling technology
    Equal wear leveling of static and dynamic data. The wear leveling assures that dynamic data as well as static data is balanced evenly across the memory. As a result
    the maximum write endurance of the device is guaranteed.
    Data Care Management
    The interruptible background process maintains the user data integrity by compensating Read Disturb effects or Retention degradation due to high temperature effects.
    UBER <10-16
    High reliability
    Pseudo SLC Flash with 20
    000 Program/Erase Cycles and everbit Reduced Write Amplification Designed with sophisticated firmware architecture for industrial and NetCom market especially 24/7 application like networking - base
  • Certificates EMC/ CE / FCC / RoHS / WEEE/ REACh
  • Weight 5 g
  • Dimensions 36.8mm x 26.65mm

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